函数发生器外文文献及翻译.docx
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函数发生器外文文献及翻译.docx
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函数发生器外文文献及翻译
外文文献1原文:
DDSdevicestoproducehigh-qualitywaveform:
asimple,efficientandflexible
Summary
Directdigitalfrequencysynthesis(DDS)technologyforthegenerationandregulationofhigh-qualitywaveforms,widelyusedinmedical,industrial,instrumentation,communications,defenseandmanyotherareas.Thisarticlewillbrieflydescribethetechnology,onitsstrengthsandweaknesses,examinesomeapplicationexamples,andalsointroducedsomenewproductsthatcontributetothepromotion
Introduction
Akeyrequirementinmanyindustriesisanexactproduction,easyoperationandquickchangeofdifferentfrequencies,differenttypesofwaveforms.Whetheritisbroadbandtransceiverrequireslowphasenoiseandexcellentspurious-freedynamicperformanceofagilefrequencysource,orforindustrialmeasurementandcontrolsystemneedsastablefrequencyexcitation,fast,easyandeconomicaltoproduceadjustablewaveformwhilemaintainingphasecontinuitycapabilitiesarecriticaltoadesignstandard,whichiswhattheadvantagesofdirectdigitalfrequencysynthesis.
Frequencysynthesistask
Thegrowingcongestionofthespectrum,coupledwithlowerpowerconsumption,qualityofnever-endingdemandforhighermeasuringequipment,thesefactorsrequiretheuseofthenewfrequencyrange,requiresabetteruseofexistingfrequencyrange.Aresult,thesearchforbettercontrol,inmostcases,bymeansoffrequencysynthesizerforfrequencygeneration.Thesedevicesuseagivenfrequency,fCoftogenerateatargetfrequency(andphase)fOUTthegeneralrelationshipcanbesimplyexpressedas:
fOUT=εx×fC
Amongthem,thescalefactorεx,sometimesknownasthenormalizedfrequency.
Theequationisusuallygradualapproximationoftherealnumberalgorithms.Whenthescalefactorisarationalnumber,tworelativelyprimenumbers(outputfrequencyandreferencefrequency)thantheharmonic.However,inmostcases,εxmaybelongtoabroadersetofrealnumbers,theapproximationprocessiswithintheacceptablerangewillbetruncated
DirectDigitalFrequencySynthesizer
Thefrequencysynthesizerapracticalwaytoachieveisthedirectdigitalfrequencysynthesis(ofDDFS),usuallyreferredtoasdirectdigitalsynthesis(DDS).Thistechniqueusingdigitaldataprocessingtogenerateafrequencyandphaseadjustableoutput,theoutputandafixedfrequencyreferenceclocksourcefC.related.DDSarchitecture,thereferenceorthesystemclockfrequencydividedbyascalefactortoproducethedesiredfrequency,thescalefactoriscontrolledbythebinarytuningwordprogrammable.
Inshort,directdigitalfrequencysynthesizertoconvertabunchofclockpulsesintoananalogwaveform,usuallyasinewave,trianglewaveorsquarewave.ShowninFigure1,itsmainparts:
thephaseaccumulator(toproducetheoutputwaveformphaseangledata),relativetodigitalconverter,(abovethephasedataisconvertedtotheinstantaneousoutputamplitudedata),anddigital-to-analogconverter(DAC)(themagnitudeofdataintoasampledanalogdatapoints)
Figure1.DDSfunctionofthesystemblockdiagram.
Forthesinewaveoutput,relativetodigitalconverterisusuallyasinelookuptable(Figure2).PhaseaccumulatorunitcountNarelativetothefrequencyoffC,accordingtothefollowingequation:
ThenumberofpulsesofthefC:
Mistheresolutionofthetuningword(24-48)
Ncorrespondstothesmallestincrementofphasechangeofthephaseaccumulatoroutputword
Figure2.TypicalDDSarchitectureandsignalpath(withDACs).
ChangingNwillimmediatelychangetheoutputphaseandfrequency,sothesystemhasitsowncontinuousphasecharacteristics,whichisoneofthekeyattributesofmanyapplications.Noloopsettlingtime,whichisdifferentfromtheanalogsystem,suchasphase-lockedloops(PLLs).DACisusuallyahigh-performancecircuit,designedspecificallyfortheDDScore(phaseaccumulatorandphaseamplitudeconverter).Inmostcases,theresultsofthedevice(usuallysingle-chip)isgenerallyreferredtoasthepureDDSortheC-DDS.
ActualDDSdevicesaregenerallymultipleregisters,inordertoachieveadifferentfrequencyandphasemodulationscheme.Suchasphaseregister,theirstoragephaseofincreaseintheoutputphaseofthephaseaccumulator.Inthisway,thecorrespondingdelayoutputsinewavephaseinaphasetuningword.Thisisusefulforphasemodulationapplicationsforcommunicationsystems.Theresolutionoftheaddercircuitdeterminesthenumberofbitsofthephasetuningword,therefore,alsodecidedtodelaytheresolution.
IntegratedinasingledeviceontheengineofaDDSandaDAChasbothadvantagesanddisadvantages,however,whetherintegratedornot,needaDACtoproduceultra-highpurityhigh-qualityanalogsignal.DACwillconvertdigitalsinusoidaloutputtoananalogsinewavemaybesingle-endedordifferential.Someofthekeyrequirementsforlowphasenoise,excellentwideband(WB)andnarrowband(NB),spurious-freedynamicrange(SFDR),andlowpowerconsumption.Iftheexternaldevice,theDACmustbefastenoughtohandlethesignal,sothebuilt-inparallelportdeviceisverycommon.
DDSandothersolutions
Thefrequencyanalogphase-lockedloops(PLLs),clockgenerator,andtheuseofFPGAdynamicprogrammingoftheoutputoftheDAC.Byexaminingthespectrumofperformanceandpowerofthesetechnologies,asimplecomparison,Table1showsthequalitativeresultsofthecomparison
Table1.DDSwithcompetingtechnologies-Advancedcompare
Powerconsumption
Spectralpurity
Remarks
DDS
Low
Middle
Easeoftuning
DiscreteDAC+FPGA
Middle
Middle-High
Withtuningcapabilities
AnalogPLL
Milddle
High
Difficulttuning
Phase-lockedloopisafeedbackloopanditscomponents:
aphasecomparator,adividerandapressure-controlledoscillator(VCO),phasecomparatorreferencefrequencyandoutputfrequency(usuallytheoutputfrequencyisN)frequency)werecompared.TheerrorvoltagegeneratedbythephasecomparatorisusedtoadjusttheVCO,thustheoutputfrequency.Whentheloopisestablished,theoutputfrequencyand/orphasewiththereferencefrequencytomaintainapreciserelationship.PLLhaslongbeenconsideredinaparticularfrequencyrange,highfidelityandconsistentsignallowphasenoiseandhighspuriousfreedynamicrange(SFDR)areidealforapplications.
PLLcannotbepreciselyandquicklytuningthefrequencyoutputwaveform,andtheslowresponse,whichlimitstheirapplicabilityforfastfrequencyhoppingandpartofthefrequencyshiftkeyingandphaseshiftkeyingapplications.
Otherprograms,includingintegratedDDSenginefieldprogrammablegatearrays(FPGAs)-asyntheticsinewaveoutputwiththeoff-the-shelfDAC-thoughthePLLfrequency-hoppingproblemcanbesolved,butthereownshortcomings.Thedefectsofthemajorsystemsworkandinterfacepowerrequirements,highcost,largesize,andsystemdevelopersmustalsoconsidertheadditionalsoftware,hardwareandmemory.Forexample,usingtheDDSengineoptioninthemodernFPGAtogeneratethe10MHzoutputsignaldynamicrangeis60dBupto72kBmemoryspace.Inaddition,designersneedtoacceptandbefamiliarwiththesubtlebalanceDDScorearchitecture..
Fromapracticalpointofview(seeTable2),thankstotherapiddevelopmentofCMOStechnologyandmoderndigitaldesigntechniques,aswellastheimprovementoftheDACtopology,DDStechnologyhasbeenabletoachieveunprecedentedlowpowerconsumptioninawiderangeofapplications,spectrumperformanceandcostlevels.AlthoughthepureDDSproductsinperformanceanddesignflexibilitytoachievethelevelofhigh-endDACtechnologyandFPGA,buttheadvantagesofDDSintermsofsize,powerconsumption,costandsimplicity,makingittheprimarychoiceformanyapplications.
Table2BenchmarkAnalysisSummary-frequencygenerationtechnique(<50MHz)
Phase-lockedloop
DAC+FPGA
DDS
Spectralperformance
High
High
Middle
Systempowerrequirements
High
High
Middle
Digitalfrequencytuning
No
Yes
Yes
Tuningresponsetime
High
Low
Low
Solutionsize
Middle
High
Low
Waveformflexibility
Low
Middle
High
Cost
Middle
High
Low
Designreuse
Middle
Low
High
Implementationcomplexity
Middle
High
Low
AlsobenotedthattheDDSdevicefordigitalmethodstoproducetheoutputwaveform,itcansimplifysomeofthearchitectureofthesolution,orthewaveformofdigitalprogrammingtocreatetheconditions.UsuallywithasinewavetoexplainthefunctionsandworkingprincipleoftheDDS,butusingmodernDDSICscaneasilygenerateatrianglewaveorsquarewave(clock)output,therebyeliminatingtheformercasethelookuptable,andthelattercasetheDACtheneedtointegrateasimpleandaccurateenough.
PerformanceandlimitationsoftheDDS
Imageandenvelope:
Sin(x)xxroll-off
TheactualoutputoftheDACisnotacontinuoussinewave,butaseriesofpulseswithasinusoidaltimeenvelope.Thecorrespondingspectrumisaseriesofimageandsignalaliasing.Imagealongthesin(x)/xenvelopedistribution(seeFigure3|margin|graph).Theneedforthefiltertosuppressfrequenciesoutsidethetargetband,butcannotinhibitthehigh-levelinthepassbandaliasing(forexample,causedduetoDACnon-linear)
TheNyquistcriterionrequiresthateachcyclerequiresatleasttwosamplingpointsinordertorebuildthedesiredoutputwaveform.TheMirroringresponsearisingfromsamplingtheoutputfrequencyK,CLOCK×OUTInthisexample,whichCLOCK=2525MHzandfOUT=5MHz,thefirstandsecondmirrorfrequencyappearin(seeFigure3)fCLOCK×fOUT,o20MHzand30MHz.Thethirdandfourthmirrorfrequencyat45MHzand55MHz.Note,sin(
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