EDA复习代码.docx
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- 上传时间:2023-07-02
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- 页数:10
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EDA复习代码.docx
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EDA复习代码
移位寄存器:
USEIEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITYSHIFTERIS
PORT(DATA:
INSTD_LOGIC_VECTOR(7DOWNTO0);
CLK:
INSTD_LOGIC;
SHIFT_LEFT:
INSTD_LOGIC;
SHIFT_RIGHT:
INSTD_LOGIC;
RESET:
INSTD_LOGIC;
MODE:
INSTD_LOGIC_VECTOR(1DOWNTO0);
QOUT:
BUFFERSTD_LOGIC_VECTOR(7DOWNTO0));
ENDSHIFTER;
ARCHITECTUREARTOFSHIFTERIS
BEGIN
PROCESS
BEGIN
WAITUNTIL(RISING_EDGE(CLK));
IF(RESET='1')THEN
QOUT<="00000000";
ELSE--同步复位功能的实现
CASEMODEIS
WHEN"01"=>QOUT<=SHIFT_RIGHT&QOUT(7DOWNTO1);
--右移一位
WHEN"10"=>QOUT<=QOUT(6DOWNTO0)&SHIFT_LEFT;
--左移一位
WHEN"11"=>QOUT<=DATA;
WHENOTHERS=>NULL;
ENDCASE;
ENDIF;
ENDPROCESS;
ENDART;
38译码器
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
USEIEEE.STD_LOGIC_UNSIGNED.ALL;--库的说明
ENTITYaaIS
PORT(A:
INSTD_LOGIC_VECTOR(2DOWNTO0);
Y:
OUTSTD_LOGIC_VECTOR(7DOWNTO0));
--定义端口,3-8译码器有3个输入8个输出
END;
ARCHITECTUREBEHAVIOROFaaIS
BEGIN
PROCESS(A)
BEGIN
CASEAIS
WHEN"000"=>Y<="00000001";
WHEN"001"=>Y<="00000010";
WHEN"010"=>Y<="00000100";
WHEN"011"=>Y<="00001000";
WHEN"100"=>Y<="00010000";
WHEN"101"=>Y<="00100000";
WHEN"110"=>Y<="01000000";
WHEN"111"=>Y<="10000000";
WHENOTHERS=>Y<="00000000";
ENDCASE;
ENDPROCESS;
ENDBEHAVIOR;
83编码器
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
USEIEEE.STD_LOGIC_UNSIGNED.ALL;--库的说明
ENTITYaaIS
PORT(A:
INSTD_LOGIC_VECTOR(2DOWNTO0);
Y:
OUTSTD_LOGIC_VECTOR(7DOWNTO0));
--定义端口,3-8译码器有8个输入3个输出
END;
ARCHITECTUREBEHAVIOROFaaIS
BEGIN
PROCESS(A)
BEGIN
CASEAIS
WHEN"00000001"=>Y<="000";
WHEN"00000010"=>Y<="001";
WHEN"00000100"=>Y<="010";
WHEN"00001000"=>Y<="011";
WHEN"00010000"=>Y<="100";
WHEN"00100000"=>Y<="101";
WHEN"01000000"=>Y<="110";
WHEN"10000000"=>Y<="111";
WHENOTHERS=>Y<="000";
ENDCASE;
ENDPROCESS;
ENDBEHAVIOR;
锁存器:
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
USEIEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITYREGIS
PORT(D:
INSTD_LOGIC_VECTOR(0TO7);
CLK:
INSTD_LOGIC;
Q:
OUTSTD_LOGIC_VECTOR(0TO7));
ENDREG;
ARCHITECTUREARTOFREGIS
BEGIN
PROCESS(CLK)
BEGIN
IF((CLK'EVENT)AND(CLK='1'))THEN
Q<=D;
ENDIF;
ENDPROCESS;
ENDART;
四选一:
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
ENTITYMUX41IS
PORT(INP:
INSTD_LOGIC_VECTOR(3DOWNTO0);
A,B:
INSTD_LOGIC;
Y:
OUTSTD_LOGIC);
ENDMUX41;
ARCHITECTUREARTOFMUX41IS
SIGNALSEL:
STD_LOGIC_VECTOR(1DOWNTO0);
BEGIN
SEL<=B&A;
PROCESS(INP,SEL)
BEGIN
IF(SEL="00")THENY<=INP(0);
ELSIF(SEL="01")THENY<=INP
(1);
ELSIF(SEL="11")THENY<=INP
(2);
ELSEY<=INP(3);
ENDIF;
ENDPROCESS;
ENDART;
三态缓冲器:
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
ENTITYTRISTATEIS
PORT(EN,DIN:
INSTD_LOGIC;
DOUT:
OUTSTD_LOGIC);
ENDTRISTATE;
ARCHITECTUREARTOFTRISTATEIS
BEGIN
PROCESS(EN,DIN)
BEGIN
IFEN=‘1’THEN
DOUT<=DIN;
ELSE
DOUT<='Z';
ENDIF;
ENDPROCESS;
ENDART;
分频器
PinDiv1M:
process(clkin)
variablecnttemp:
INTEGERRANGE0TO49;
BEGIN
IFclkin='1'ANDclkin'eventTHEN
IFcnttemp=49THENcnttemp:
=0;
ELSE
IFcnttemp<25THENclk1m<='1';
elseclk1m<='0';
endif;
cnttemp:
=cnttemp+1;
endif;
endif;
endprocessPinDiv1M;
计数器60进制
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
USEIEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITYCNTM60IS
PORT(CI:
INSTD_LOGIC;
NRESET:
INSTD_LOGIC;
LOAD:
INSTD_LOGIC;
D:
INSTD_LOGIC_VECTOR(7DOWNTO0);
CLK:
INSTD_LOGIC;
CO:
OUTSTD_LOGIC;
QH:
BUFFERSTD_LOGIC_VECTOR(3DOWNTO0);
QL:
BUFFERSTD_LOGIC_VECTOR(3DOWNTO0));
ENDCNTM60;
ARCHITECTUREARTOFCNTM60IS
BEGIN
CO<='1'WHEN(QH="0101"ANDQL="1001"ANDCI='1')ELSE'0';
--进位输出的产生
PROCESS(CLK,NRESET)
BEGIN
IF(NRESET='0')THEN--异步复位
QH<="0000";
QL<="0000";
ELSIF(CLK'EVENTANDCLK='1')THEN--同步置数
IF(LOAD='1')THEN
QH<=D(7DOWNTO4);
QL<=D(3DOWNTO0);
ELSIF(CI='1')THEN--模60的实现
IF(QL=9)THEN
QL<="0000";
IF(QH=5)THEN
QH<="0000";
ELSE--计数功能的实现
QH<=QH+1;
ENDIF;
ELSE
QL<=QL+1;
ENDIF;
ENDIF;
ENDIF;--ENDIFLOAD
ENDPROCESS;
ENDART;
24进制
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
USEIEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITYCNTM24IS
PORT(CI:
INSTD_LOGIC;
NRESET:
INSTD_LOGIC;
LOAD:
INSTD_LOGIC;
D:
INSTD_LOGIC_VECTOR(7DOWNTO0);
CLK:
INSTD_LOGIC;
CO:
OUTSTD_LOGIC;
QH:
BUFFERSTD_LOGIC_VECTOR(3DOWNTO0);
QL:
BUFFERSTD_LOGIC_VECTOR(3DOWNTO0));
ENDCNTM24;
ARCHITECTUREARTOFCNTM24IS
BEGIN
CO<='1'WHEN(QH="0001"ANDQL="0011"ANDCI='1')ELSE'0';
--进位输出的产生
PROCESS(CLK,NRESET)
BEGIN
IF(NRESET='0')THEN--异步复位
QH<="0000";
QL<="0000";
ELSIF(CLK'EVENTANDCLK='1')THEN--同步置数
IF(LOAD='1')THEN
QH<=D(7DOWNTO4);
QL<=D(3DOWNTO0);
ELSIF(CI='1')THEN--模10的实现
IF(QL=9)THEN
QL<="0000";
QH<=QH+1;
ELSE
QL<=QL+1;
ENDIF;
IF(QH=2ANDQL=3)THEN
QH<="0000";
QL<="0000";
--CO<=1;
--ELSE--计数功能的实现
--QH<=QH+1;
ENDIF;
ENDIF;
ENDIF;--ENDIFLOAD
ENDPROCESS;
ENDART;
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